Global UniChip Improves Quality of Silicon with Cadence Synthesis Technology; Encounter RTL Compiler Global Synthesis Reduces Die Area for ARM9 by 8 Percent
SAN JOSE, Calif.—(BUSINESS WIRE)—July 31, 2005—
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN)
today announced that Global UniChip Corporation of Taiwan has adopted
Cadence(R) Encounter(R) RTL Compiler global synthesis, part of the
Encounter digital IC design platform, to improve the quality of
silicon (QoS) of its hardened IP.
Global UniChip provides design solutions from silicon-proven
intellectual property (IPs) to complex system-on-chip designs in both
mature and leading-edge technologies. As an ARM Approved Design Center
partner, Global UniChip offers total design, consultancy and foundry
capabilities to OEMs and silicon vendors of ARM core-based systems.
Using Encounter RTL Compiler to synthesize the ARM926EJ-S from RTL
resulted in an eight-percent reduction in die size after place and
route.
"We have successfully completed more than 10 tapeouts at 130
nanometers using the Encounter platform, and are currently using it
for 90-nanometer tapeouts," said Jim Lai, chief operating officer and
president at Global UniChip. "Based on our successes with Encounter
RTL Compiler on customer designs, we are also using it to harden an
ARM9 core, and we were pleased that the netlist the tool produced
resulted in a smaller die area. This will make our offering even more
competitive."
Encounter RTL Compiler global synthesis has proven through
tapeouts to deliver improved performance, smaller die sizes, lower
power consumption, and faster design closure through place and route.
Cadence defines this metric as quality of silicon (QoS). This ability
to produce smaller, faster and cooler chips in less time has increased
customer competitiveness and reduced overall costs.
"We are excited that Encounter RTL Compiler played a significant
role in enabling Global UniChip to improve their quality of silicon in
a very competitive market," said Dr. Chi-Ping Hsu, corporate vice
president at Cadence. "The new innovations brought by Encounter RTL
Compiler has started a logic synthesis retooling trend worldwide to
design smaller, faster, and cooler chips in less time."
Encounter RTL Compiler has been used in production by more than
100 customers worldwide for competitive markets in consumer,
communications, computer, networking, graphics, and SoC designs.
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, consumer electronics, networking and
telecommunications equipment, and computer systems. Cadence reported
2004 revenues of approximately $1.2 billion, and has approximately
5,000 employees. The company is headquartered in San Jose, Calif.,
with sales offices, design centers, and research facilities around the
world to serve the global electronics industry. More information about
the company, its products, and services is available at
www.cadence.com.
Cadence and the Cadence logo are registered trademarks, and
Encounter is a trademark of Cadence Design Systems, Inc. All other
trademarks are the property of their respective owners.
Contact:
Cadence Design Systems, Inc.
Michael Fournell, 408-428-5135
Email Contact
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